Can Memory And Register Layout; Figure 13-2: Memory Area Of The Fcan System - NEC V850E/CA1 ATOMIC Preliminary User's Manual

13.2.2 CAN memory and register layout

All buffers and registers of the FCAN system are arranged within a memory layout of 3 KB.
Address Offset
0000H
Remarks: 1. Effective address = PP_BASE + address offset
2. The memory area is located in the 16 KB programmable peripheral I/O area of the
V850E/CA1 (Atomic). The base address (PP_BASE) of the programmable peripheral I/O
area is set by the BPC register (refer to 3.4.9 Programmable peripheral I/O regis-
ters).
3. The memory area of the FCAN system is divided into certain functional sections. The
start and end addresses of those sections are given as an address offset value.
Caution: Before accessing any register or buffer of the FCAN system the base address
PP_BASE must be fixed by the BPC register.
The sections within the FCAN memory layout contain areas, which are defined as illegal addresses or
CANx temporary buffer (x = 1 to 3).
Remarks: 1. Areas defined as illegal addresses contain neither FCAN registers nor FCAN buffers.
Those area must not be read nor written by user program.
2. CANx temporary buffers can be accessed by CPU (write and read accesses) when the
GOM bit of the CGST register is cleared (0) (means FCAN system inactive).
Whenever the FCAN system is in global operating mode (GOM = 1) the temporary buffer
must not be written by the CPU. The global interrupt GINT2 signals accidental write
accesses by CPU while the FCAN system is active.
Chapter 13 FCAN Interface Function

Figure 13-2: Memory Area of the FCAN System

8FFH
CAN3 temporary buffer
8E0H
8DFH
CAN3 register section
(2 bytes/register)
8C0H
8BFH
CAN2 temporary buffer
8A0H
89FH
CAN2 register section
(2 bytes/register)
880H
87FH
CAN1 temporary buffer
860H
85FH
CAN1 register section
(2 bytes/register)
840H
83FH
illegal addresses
81EH
81DH
CAN common register section
(2 bytes/register)
810H
80FH
illegal addresses
80EH
80DH
CAN interrupt pending register section
(2 bytes/register)
800H
7FFH
CAN message buffer section
with
64 message buffer
(32 bytes/message buffer)
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CAN module section
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