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Table 3-4: List of Peripheral I/O Registers (Sheet 2 of 10)
Address
Function Register Name
FFFFF06EH
System wait control register
FFFFF080H
DMA source address register L0
FFFFF082H
DMA source address register H0
FFFFF084H
DMA destination address register L0 DDAL0
FFFFF086H
DMA destination address register H0 DDAH0
FFFFF088H
DMA source address register L1
FFFFF08AH
DMA source address register H1
FFFFF08CH
DMA destination address register L1 DDAL1
FFFFF08EH
DMA destination address register H1 DDAH1
FFFFF090H
DMA source address register L2
FFFFF092H
DMA source address register H2
FFFFF094H
DMA destination address register L2 DDAL2
FFFFF096H
DMA destination address register H2 DDAH2
FFFFF098H
DMA source address register L3
FFFFF09AH
DMA source address register H3
FFFFF09CH
DMA destination address register L3 DDAL3
FFFFF09EH
DMA destination address register H3 DDAH3
FFFFF0C0H
DMA transfer count register 0
FFFFF0C2H
DMA transfer count register 1
FFFFF0C4H
DMA transfer count register 2
FFFFF0C6H
DMA transfer count register 3
FFFFF0D0H
DMA addressing control register 0
FFFFF0D2H
DMA addressing control register 1
FFFFF0D4H
DMA addressing control register 2
FFFFF0D6H
DMA addressing control register 3
FFFFF0E0H
DMA channel control register 0
FFFFF0E2H
DMA channel control register 1
FFFFF0E4H
DMA channel control register 2
FFFFF0E6H
DMA channel control register 3
FFFFF0F0H
DMA disable status register
FFFFF0F2H
DMA restart register
FFFFF100H
Interrupt mask register 0
FFFFF100H Interrupt mask register 0L
FFFFF101H Interrupt mask register 0H
FFFFF102H
Interrupt mask register 1
FFFFF102H Interrupt mask register 1L
FFFFF103H Interrupt mask register 1H
FFFFF104H
Interrupt mask register 2
FFFFF104H Interrupt mask register 2L
FFFFF105H Interrupt mask register 2H
FFFFF106H
Interrupt mask register 3
FFFFF106H Interrupt mask register 3L
FFFFF107H Interrupt mask register 3H
72
Chapter 3 CPU Function
VSWC
DSAL0
DSAH0
DSAL1
DSAH1
DSAL2
DSAH2
DSAL3
DSAH3
DBC0
DBC1
DBC2
DBC3
DADC0
DADC1
DADC2
DADC3
DCHC0
DCHC1
DCHC2
DCHC3
DDIS
DRST
IMR0
IMR0L
IMR0H
IMR1
IMR1L
IMR1H
IMR2
IMR2L
IMR2H
IMR3
IMR3L
IMR3H
Preliminary User's Manual U14913EE1V0UM00
Symbol
R/W
Bit Units for Manipulation
1 bit
×
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
×
R/W
×
R/W
×
R/W
×
R/W
×
R
×
R/W
R/W
×
R/W
×
R/W
×
R/W
×
R/W
×
R/W
×
R/W
×
R/W
×
R/W
R/W
×
R/W
×
R/W
Initial Value
8 bits
16 bits
×
77H
×
Undefined
×
Undefined
×
Undefined
×
Undefined
×
Undefined
×
Undefined
×
Undefined
×
Undefined
×
Undefined
×
Undefined
×
Undefined
×
Undefined
×
Undefined
×
Undefined
×
Undefined
×
Undefined
×
Undefined
×
Undefined
×
Undefined
×
Undefined
×
0000H
×
0000H
×
0000H
×
0000H
×
00H
×
00H
×
00H
×
00H
×
00H
×
00H
×
FFFFH
×
FFH
×
FFH
×
×
FFFFH
×
FFH
×
FFH
×
×
FFFFH
×
FFH
×
FFH
×
×
FFFFH
×
FFH
×
FFH
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