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12.2 Asynchronous Serial Interfaces 0 to 2 (UART0, UART1, UART2)
12.2.1 Features
•
Transfer rate: 300 bps to 625 Kbps
(using a dedicated baud rate generator and an internal system clock of 20 MHz)
•
Full-duplex communications
- On-chip reception buffer register (RXBn)
- On-chip transmission buffer register (TXBn)
•
Two-pin configuration
- TXDn:
- RXDn:
•
Reception error detection functions
- Parity error
- Framing error
- Overrun error
•
Interrupt sources: 3 types
- Reception error interrupt (INTSERn):
- Reception completion interrupt (INTSRn):
- Transmission completion interrupt (INTSTn): Interrupt is generated when the serial transmission
•
Character length: 7 or 8 bits
•
Parity functions: Odd, even, 0, or none
•
Transmission stop bits: 1 or 2 bits
•
On-chip dedicated baud rate generator
Remark: n = 0 to 2
310
Chapter 12 Serial Interface Function
Interrupt is generated according to the logical OR of
the three types of reception errors.
Interrupt is generated when receive data is trans-
ferred from the shift register to the reception buffer
register after serial transfer is completed during a
reception enabled state.
of transmit data (8 or 7 bits) from the shift register is
completed.
Preliminary User's Manual U14913EE1V0UM00
Transmit data output pin
Receive data input pin
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