Table of Contents
Advertisement
Table 8-10: Operation after WATCH mode release by interrupt request
Release cause
NMI request
Maskable interrupt
request
Remark: If WATCH mode is entered during execution of a particular interrupt handler and an
unmasked interrupt request with a higher priority than the previous one is subsequently gen-
erated, the program branches to the vector address for the later interrupt.
(2)
When released by RESET input
This operation is the same as normal reset operation. 1 ms Flash charge pump stabilization time
must be ensured by reset input.
(3)
When released by WATCHDOG TIMER RESET input
After 1 ms has passed, CPU starts operation.
Remark: Before entering the WATCH mode the PLL must be switched off by software. After the
WATCH mode has been released the PLL can be switched on again. However, the start-up
of the PLL causes always a certain delay of some Milliseconds. During this time, the clock
operates, but the CPU operation is suspended due to clock security reasons.
If it is required to have a fast response when waking up from WATCH mode, the PLL should
not be re-enabled after waking up, as this causes again the delay. In this case, time-relevant
reactions of the CPU should be done first, before re-enabling the PLL.
238
Chapter 8 Clock Generator
EI state
Branches to handler address.
Branches to handler address, or
executes the next instruction.
Preliminary User's Manual U14913EE1V0UM00
DI state
Executes the next instruction.
Advertisement
Table of Contents
