Figure 13-35: Can 1 To 3 Definition Registers (C1Def To C3Def) (1/3) - NEC V850E/CA1 ATOMIC Preliminary User's Manual

32-/16-bit single-chip microcontroller
Table of Contents

Advertisement

(3)
CAN 1 to 3 definition registers (C1DEF to C3DEF)
The CxDEF registers define normal and diagnostic operation and indicate CAN bus error and
states of the corresponding CAN module x (x = 1 to 3).
These registers can be read in 8-bit and 16-bit units. It can be written in 16-bit units only. For setting
and clearing certain bits a special set/clear method applies (refer to chapter 13.3.1).

Figure 13-35: CAN 1 to 3 Definition Registers (C1DEF to C3DEF) (1/3)

Read 15
14
13
C1DEF
0
0
0
C2DEF
0
0
0
C3DEF
0
0
0
Write 15
14
13
ST_
ST_
ST_
C1DEF
DGM
MOM
SSHT
ST_
ST_
ST_
C2DEF
DGM
MOM
SSHT
ST_
ST_
ST_
C3DEF
DGM
MOM
SSHT
Read (1/2)
Bit Position
Bit Name
7
DGM
6
MOM
Note: The register address is calculated according to the following formula:
effective address = PP_BASE + address offset
Chapter 13 FCAN Interface Function
12
11
10
9
8
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
12
11
10
9
8
ST_
0
0
0
0
PBB
ST_
0
0
0
0
PBB
ST_
0
0
0
0
PBB
Specifies the storage of receive message in diagnostic mode.
0: receive only and store valid message in message buffer type 7
1: receive only and store valid message as in normal operation mode
Remark:
The settings of the DGM bit are only effective in diagnostic mode
(MOM = 1). In normal operation mode (MOM = 0) the DGM bit settings
have no meaning.
Defines the module operating mode.
0: Normal operating mode
1: Diagnostic mode
Remarks:
1. The diagnostic mode provides the following functional behavior:
(a) Transmission of data frames and remote frames is not possible.
(b) No acknowledge is generated upon reception of a valid message.
(c) On reception of a valid message the VALID flag is set (0).
(d) Receive and transmit error counters remain unchanged on errors.
2. The diagnostic mode can be used for baud rate detection and diag-
nostic purposes.
Caution:
When the diagnostic mode (MOM = 1) is defined for a CAN module,
the CxBRP register is only accessible in the initialisation state
(ISTAT = 1). While ISTAT is cleared (0) write access to the CxBRP is
prohibited and reading the address of the CxBRP register returns
the status of the CxDINF register.
Preliminary User's Manual U14913EE1V0UM00
7
6
5
4
3
DGM MOM SSHT PBB BERR VALID WAKE OVR
DGM MOM SSHT PBB BERR VALID WAKE OVR
DGM MOM SSHT PBB BERR VALID WAKE OVR
7
6
5
4
3
CL_
CL_
CL_
CL_
CL_
DGM
MOM
SSHT
PBB
BERR
CL_
CL_
CL_
CL_
CL_
DGM
MOM
SSHT
PBB
BERR
CL_
CL_
CL_
CL_
CL_
DGM
MOM
SSHT
PBB
BERR
Function
Address
Note
2
1
0
Offset
852H
892H
8D2H
2
1
0
CL_
CL_
CL_
852H
VALID
WAKE
OVR
CL_
CL_
CL_
892H
VALID
WAKE
OVR
CL_
CL_
CL_
8D2H
VALID
WAKE
OVR
Initial
value
0101H
0101H
0101H
431

Advertisement

Table of Contents
loading

Table of Contents