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5.2 Port P2 (P22 to P20)
Port P2 is a 3-bit input/output port.
It is also used as an external interrupt, a STOP mode release signal input, and low-frequency crystal oscillator con-
nection pins. When used as an input port or a secondary function pins, respective output latch (P2DR) should be set
to "1".
During reset, the P2DR is initialized to "1".
A low-frequency crystal oscillator (32.768 kHz) is connected to pins P21 (XTIN) and P22 (XTOUT) in the dual-
clock mode. In the single-clock mode, pins P21 and P22 can be used as normal input/output ports.
It is recommended that pin P20 should be used as an external interrupt input, a STOP mode release signal input, or
an input port. If it is used as an output port, the interrupt latch is set on the falling edge of the output pulse.
P2 port output latch (P2DR) and P2 port terminal input (P2PRD) are located on their respective address.
When read the output latch data, the P2DR should be read and when read the terminal input data, the P2PRD reg-
ister should be read. If a read instruction is executed for port P2, read data of bits 7 to 3 are unstable.
Data input (P20PRD)
Data input (P20)
Data output (P20)
Control input
Data input (P21PRD)
Data input (P21)
Data output (P21)
Data input (P22PRD)
Data input (P22)
Data output (P22)
ST P
UTEN
XTEN
Port P2 control register
7
6
P2DR
(0002H)
R/W
7
6
P2PRD
(0009H)
Read only
Note: Port P20 is used as
High-Z mode.
D
Q
utput latch
D
Q
utput latch
D
Q
utput latch
fs
Figure 5-3 Port P2
5
4
3
5
4
3
pin. Therefore, when stop mode is started, OUTEN does not affect to P20, and P20 becomes
STOP
Page 53
sc. enable
2
1
0
P22
P21
P20
XTOUT
XTIN
(Initial value: **** *111)
INT5
STOP
2
1
0
P22
P21
P20
TMP86PM29BUG
P20 (INT5, ST P)
P21 (XTIN)
P22 (XT UT)
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