Xilinx 7 Series User Manual page 32

Chapter 2: DSP48E1 Description and Specifics
Table 2-5: INMODE[3:0] Functions (when AREG = 1 or 2) (Cont'd)
INMODE[3]
Notes:
1. Set the data on the D and the A1/A2 ports so the pre-adder, which does not support saturation, does
INMODE[0] selects between A1 (INMODE[0] = 1) and A2 (INMODE[0] = 0).
INMODE[1] =1 forces the A input to the pre-adder to 0.
INMODE[2] = 0 forces the D input to the pre-adder to 0.
INMODE[3] provides pre-adder subtract control, where INMODE[3] = 1 indicates subtract
and INMODE[3] = 0 indicates add.
INMODE[4] selects the Multiplier B port as shown in
Table 2-6: INMODE[4] Encoding (when BREG = 1 or 2)
The 48-bit C port is used as a general input to the Y and Z multiplexers to perform add,
subtract, three-input add/subtract, and logic functions. The C input is also connected to
the pattern detector for rounding function implementations. The C port logic is shown in
Figure
X-Ref Target - Figure 2-9
32
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INMODE[2] INMODE[1]
1 1
1 1
not overflow or underflow. See
INMODE[4] Multiplier B Port
B2
0
B1
1
2-9. The CREG attribute selects the number of pipestages for the C input datapath.
C
CEC
RSTC
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INMODE[0] USE_DPORT
1 0
1 1
Pre-adder, page 40.
Table
48
48
D
48
EN
RST
Figure 2-9: C Port Logic
Multiplier A Port
TRUE D
TRUE D
2-6.
C Input to
Y and Z
Multiplexers and
Pattern Detector
UG369_c1_09_051209
7 Series DSP48E1 User Guide
UG479 (v1.10) March 27, 2018