Xilinx 7 Series User Manual page 31

X-Ref Target - Figure 2-8
B
BCIN
Table 2-5
functionality of the pre-adder, the A and D input registers. The USE_DPORT attribute
must be set to TRUE to enable the pre-adder functions described in
which selects between B1 and B2, is shown in
In summary, the INMODE and USE_DPORT attributes control the pre-adder functionality
and A, B, and D register bus multiplexers that precede the multiplier. If the pre-adder is not
used, the default of USE_DPORT is FALSE.
Table 2-5: INMODE[3:0] Functions (when AREG = 1 or 2)
INMODE[3]
7 Series DSP48E1 User Guide
UG479 (v1.10) March 27, 2018
18
B1
CEB1 RSTB
Figure 2-8: Dual B Register Logic
shows the encoding for the INMODE[3:0] control bits. These bits select the
INMODE[2] INMODE[1]
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 1
0 1
0 1
0 1
1 0
1 0
1 0
1 0
1 1
1 1
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Simplified DSP48E1 Slice Operation
B2
CEB2 RSTB
INMODE[4]
Table 2-6.
INMODE[0] USE_DPORT
FALSE
0 0
FALSE
0 1
FALSE
1 0
FALSE
1 1
0 0
0 1
1 0
1 1
0 0
0 1
1 0
1 1
0 0
0 1
1 0
1 1
0 0
0 1
BCOUT
18
X MUX
18
0
B MULT
18
1
UG369_c1_08_040914
Table 2-5. INMODE[4],
Multiplier A Port
A2
A1
Zero
Zero
TRUE A2
TRUE A1
TRUE Zero
TRUE Zero
(1)
TRUE D + A2
(1)
TRUE D + A1
TRUE D
TRUE D
TRUE -A2
TRUE -A1
TRUE Zero
TRUE Zero
(1)
TRUE D – A2
(1)
TRUE D – A1
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