Xilinx 7 Series User Manual page 38

Chapter 2: DSP48E1 Description and Specifics
All the output ports except ACOUT and BCOUT are reset by RSTP and enabled by CEP
(see
Figure 2-7
X-Ref Target - Figure 2-13
P Port
Each DSP48E1 slice has a 48-bit output port P. This output can be connected (cascaded
connection) to the adjacent DSP48E1 slice internally through the PCOUT path. The PCOUT
connects to the input of the Z multiplexer (PCIN) in the adjacent DSP48E1 slice. This path
provides an output cascade stream between adjacent DSP48E1 slices.
CARRYCASCOUT and CARRYOUT Ports
The carry out from each DSP48E1 slice can be sent to the FPGA logic using the
CARRYOUT port. This port is 4 bits wide. CARRYOUT[3] is the valid carry output for a
two-input 48-bit adder/subtracter or one-input accumulator. In this case,
USE_SIMD = ONE48 is the default setting and represents a non-SIMD configuration.
When a two-input adder/subtracter or one-input accumulator is used in SIMD mode, such
as TWO24 or FOUR12, the valid CARRYOUT signals are listed in
CARRYOUT signals are not valid if three-input adder/subtracter (for example,
A:B + C + PCIN) or two-input accumulator (for example, A:B + C + P) configurations are
used or if the multiplier is used.
Table 2-12: CARRYOUT Bit Associated with Different SIMD Mode
FOUR12
TWO24
ONE48
See also
The CARRYOUT signal is cascaded to the next adjacent DSP48E1 slice using the
CARRYCASCOUT port. Larger add, subtract, ACC, and MACC functions can be
implemented in the DSP48E1 slice using the CARRYCASCOUT output port. The 1-bit
CARRYCASCOUT signal corresponds to CARRYOUT[3], but is not identical. The
38
Send Feedback
Figure 2-13). ACOUT and BCOUT are reset by RSTA and RSTB, respectively (shown in
and Figure 2-8).
P/PCOUT/MULTSIGNOUT/
CARRYCASCOUT/
CARRYOUT/
PATTERNDETECT/
PATTERNBDETECT
Figure 2-13: Output Port Logic
SIMD Mode
Table 2-10, page 35 for 3-input ALUMODE operations.
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D
CEP EN Q
RST
RSTP
Adder Bit Width
P[11:0]
P[23:12]
P[35:24]
P[47:36]
P[23:0]
P[47:24]
P[47:0]
DSP48E1
Slice Output
UG369_c1_13_051209
Table 2-12. The
Corresponding CARRYOUT
CARRYOUT[0]
CARRYOUT[1]
CARRYOUT[2]
CARRYOUT[3]
CARRYOUT[1]
CARRYOUT[3]
CARRYOUT[3]
7 Series DSP48E1 User Guide
UG479 (v1.10) March 27, 2018