instruction/multiple data (SIMD) functionality, and MACC and Add-Acc extension to
96 bits. The DSP slice supports convergent and symmetric rounding, terminal count
detection and auto-resetting for counters, and overflow/underflow detection for
sequential accumulators.
ALU functions are identical in 7 series FPGA DSP48E1 slice as in the Virtex-6 FPGA
DSP48E1 slice. See
7 Series DSP48E1 User Guide
UG479 (v1.10) March 27, 2018
ALUMODE Inputs, page 35
www.xilinx.com
DSP48E1 Slice Features
for more information.
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