AT&T 3B2 Off-Line Diagnostic Manual page 77

- - - - - - - - - - - - - - - - - - - - Version 2 Hardware System Board Diagnostics
Phase' #(11 )14 - Control and Status Register
Phase Name:
Type:
Function:
Tests:
Time:
Warnings:
Notes:
Control and Status Register (cc-csrtst)
Normal
This phase performs access tests on the Control and Status Register (CSR).
Test 1 - confirms that the CSR can be read with half word and 2-byte read
operations.
Tests 2 and 3 - confirm that CSR bits II, 10, 8, 7, 5, and 4 can be set and
cleared by software.
1 second
None
CSR bits IS, 14, 12, 3, 2, I, and 0 are tested within their respective diagnostic
routines.
Control Status Register Bit Assignments
15 8
TT
I
PE
I
RR
I
AF
I
FL
I
FM
I
R
I
IT
7 0
IF
I
R
I
18
I
19
I
UI
I
DI
I
DMI
I
10F
TT
=
Error Timer Timeout
PE
=
Memory Parity Error
RR
=
System Reset Request
AF = Alignment Fault
FL
=
Failure LED
FM
=
Floppy Motor On
R
=
Reserved
IT = Inhibit Timers
IF = Inhibit Faults
R
=
Reserved
18
= PIR Level 8 Int.
19
=
PIR Level 9 Int.
UI
= UART Interrupt
DI
=
Disk Interrupt
DMI
= DMA Interrupt
10F
= I/O Board Fail
SYSTEM BOARD DIAGNOSTICS 3-37