Phase Descriptions - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Phase #18 -
PORTS-DUART 1 Internal Loop
Phase Name:
Type:
Function:
Tests:
PORTS -
DUART (SC2681) 1 Internal Loop Test (duartl_l)
Demand
This phase verifies the ability of Dual Universal Asynchronous
Receiver /Transmitter (DUART) 1 to do internal loop around at various baud
rates.
Tests 1 through 10 -
check the internal loop of the ASCII characters through
DUART I, Port
1.
Tests 11 through 20 -
check the internal loop of the ASCII characters through
DUART I, Port 2.
Test 21 -
verifies the operation of the FIFO Full and Overrun Error bits for
DUART I, Port 1.
Test 22 -
verifies the operation of the FIFO Full and Overrun Error bits for
DUART I, Port 2.
Test (23) -
checks the ability of the DUART to send an interrupt when the
Receive Data register on DUART I, Port 1 is enabled and has received a
character.
Test (24) -
checks the ability of the DUART to send an interrupt when the
Transmit Data register on DUART I, Port 1 is enabled and after a character has
been transmitted.
Test (25) -
checks the ability of the DUART to send an interrupt when the
Receive Data register on DUART I, Port 2 is enabled and has received a
character.
Test (26) -
checks the ability of the DUART to send an interrupt when the
Transmit Data register on DUART I, Port 2 is enabled and after a character has
been transmitted.
Test (27) -
checks the ability of the DUART to send an interrupt when the
Receive buffer is full (3 characters) on DUART I, Port
1.
Test (28) -
checks the ability of the DUART to send an interrupt when the
Receive buffer is full (3 characters) on DUART I, Port 2.
Test (29) -
checks the ability of the DUART to send an interrupt when a
break character is detected on DUART I, Port
1.
Test (30) -
checks the ability of the DUART to send an interrupt when a
break character is detected on DUART I, Port 2.
Test (31) -
checks the ability of the DUART to send an interrupt when
"Counter Ready" is detected on DUART 1.
8·38 OFF·LINE DIAGNOSTIC MANUAL
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