System Board Diagnostics Introduction; Version 2 Hardware System Board Diagnostics - AT&T 3B2 Off-Line Diagnostic Manual

- - - - - - - - - - - - - - - - - - - - - Version 2 Hardware System Board Diagnostics
• Interrupt Structure
• Timers (includes Time-of-Day clock, Periodic timer, and Bus timer)
• Control and Status Register (CSR)
• Erasable Programmable Read Only Memory (EPROM)
• Nonvolatile Random Access Memory (NVRAM).
In addition, the DRAM boards and the Input/Output (I/O) expansion board plug into the SBD.
Twenty diagnostic phases for Release 2.0 or 23 diagnostic phases for Release 2.0.4 and subsequent
releases run tests on all major SBD components. The Table of Contents listing will help you locate the
descriptions for each SBD phase and its associated tests. The phase and test descriptions are organized
numerically in the same order that the phases are run on the 3B2 computer.
SYSTEM BOARD DIAGNOSTICS 3-3