Phase Descriptions - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Test Numbers:
54 through 70
Function:
These tests verify that the DMAO Source (low) register is functional.
Procedure:
Write a valid data pattern to the register, read the register, and compare the
value read with the expected value.
Hardware Tested:
The DMAO Source (low) register is tested.
Data Returned:
Supplemental Data: The value that was written.
Raw Data: The value that was read.
Notes:
The values written to the register are OxOO and walk a one through a field of 16
zeros.
Test Numbers:
76 through 90
Function:
These tests verify that the DMA1 Control register is functional.
Procedure:
Write a valid data pattern to the register, read the register, and compare the
value read with the expected value.
Hardware Tested:
The DMA1 Control register is tested.
Data Returned:
Supplemental Data: The value that was written.
Raw Data: The value that was read.
Notes:
The values written to the register are Ox8000, Ox4000, Ox2000, Ox1000, Ox0800,
Ox0400, Ox0200, Ox0100, Ox0080, Ox0040, Ox0020, Ox0010, Ox0001, and OxOOOO.
Test Numbers:
91 through 107
Function:
The tests verify that the DMA1 Terminal Count register is functional.
Procedure:
Write a valid data pattern to the register, read the register, and compare the
value read with the expected value.
Hardware Tested:
The DMA1 Terminal Count register is tested.
Data Returned:
Supplemental Data: The value that was written.
Raw Data: The value that was read.
Notes:
The values written to the register are OxOOOO and walk a one through a field of
16 zeros.
9-10
OFF-LINE DIAGNOSTIC MANUAL
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