AT&T 3B2 Off-Line Diagnostic Manual page 470

Phase Descriptions - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Phase #15 - EPORTS - DTR and Basic Interrupt Integrity
Phase Name:
Type:
Function:
Tests:
Time:
Warnings:
Notes:
EPORTS - DTR and Basic Interrupt Integrity (dtr)
Demand
This phase diagnoses the Data Terminal Ready (DTR) register by writing and
reading all bit combinations. The phase then tests basic integrity of the Serial
Communication Controller (SCC) interrupt and acknowledge circuitry.
Tests 1 through 256 - write a number equal to the test number minus 1 into
the DTR register and read it back.
Test 257 - causes a transmit buffer empty interrupt on the SCC furthest
electrically from the INTEL 80186 Microprocessor, and checks to see that the
proper interrupt was taken. This will verify the basic sanity of the interrupt
and acknowledge circuitry to SCCs.
1 second
None
None
9-2& OFF-LINE DIAGNOSTIC MANUAL