AT&T 3B2 Off-Line Diagnostic Manual page 216

Phase Descriptions - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Phase #11 MPB Memory Management Unit Test #3
Diagnostics
Phase Name: Memory Management Unit (MMU) (bmmu3_tst)
Type: Normal
Function: This phase tests translation capability and the R&M update.
Tests: Test 1 - checks the paged segment address translation.
Time:
Warnings:
Notes:
Test 2 - checks the contiguous segment address translation.
Tests 3 through 18 - perform the R&M updating of the MMU.
3 seconds
None
The MMU test mapping scheme is as follows:
+--------------+
OxOOOOOOOO I Low Core RAM I
Segments
I Read/Execute I
0 - 1
+--------------+
Ox00040000 I Misc. Hdw Oevl
I Read/Write I
Ox02000000
Ox02020000
Ox02040000
Ox02060000
Ox0206ffff
Ox02070000
Ox0207ffff
+--------------+
FW RAM AREA I
Read/Write I
+--------------+
MMU Text
I Read/Execute I
+--------------+
MMU Tables
Read/Write
+--------------+
Scratch
RAM
Read/Write
+--------------+
Low Core Gatel
Tables I
Read/Write
+--------------+
2 - 255
256
257
258
259
v
The Memory Management Tables in memory are set as follows:
SOT Table
+------------------+
Segment #0
Ox02040000
+------------------+
Segment #1
Ox02040008
+------------------+
+------------------+
Segment #259
Ox02040818
+------------------+
<
64 Pages >
<
Per Segment>
<
64 Pages >
<
Per Segment>
<
64 Pages >
<
Per Segment>
PDT Table
+------------------+
Pages #0-63
Ox02040900
+------------------+
Pages #64-127
Ox02040aOO
+------------------+
+------------------+
Page #16576
Ox02050cOO
+------------------+
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