AT&T 3B2 Off-Line Diagnostic Manual page 230

Phase Descriptions - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Phase #14
Phase Name:
Type:
Function:
Tests:
Time:
Warnings:
Notes:
Phase #14 Tests
MPB Main Store Diagnostics
Main Store (braI1L-tst)
Demand
This phase checks the memory by performing the following tests.
Test 1 - checks all memory accesses on a word basis with alternate data
patterns through memory range. A pattern of 55's followed by aa's.
Test 2 - checks memory accesses by writing words and reading back two half
words.
Test 3 - checks memory accesses by writing two half words and reading back
4 bytes.
Test 4 - checks memory accesses by writing and reading 4 bytes.
7 seconds per megabyte
None
None
Test Number: 1
Function: This test checks all memory accesses on a word basis with alternate data
patterns throughout memory range.
Procedure: A pattern of 55's and aa's is written and then read.
Hardware Tested: The Buffered Microbus (BuBus) Board Memory is tested.
Data Returned: The failing address, expected value, and actual value read are returned.
Notes: None
Tests Numbers: 2 through 4
Function: These tests check variable size accesses.
Procedure: Test 2 - writes words and reads back as shorts. Increment address by 200.
Test 3 - writes two shorts and reads back as bytes. Increment address by 400.
Test 4 - writes and reads 4 bytes. Increment address by 800.
Hardware Tested: The BuBus Board Memory is tested.
Data Returned: The failing address, expected value, and actual value read are returned.
Notes: None
4-48 OFF-LINE DIAGNOSTIC MANUAL