200 Mhz 2.5V Lvds Oscillator; Differential Sma Mrcc Pin Inputs; Superclock-2 Module - Xilinx Kintex-7 FPGA KC724 User Manual

Chapter 1: KC724 Board Features and Operation

200 MHz 2.5V LVDS Oscillator

U35 (callout 20,
The KC724 board has one 200 MHz 2.5V LVDS oscillator (U35) connected to multi-region
clock capable (MRCC) inputs on the FPGA.
LVDS oscillator.
Table 1-6: LVDS Oscillator MRCC Connections
FPGA (U1)
Pin Function
C25 SYSTEM CLOCK_P
B25 SYSTEM CLOCK_N

Differential SMA MRCC Pin Inputs

Callout 21,
The KC724 board provides two pairs of differential SMA transceiver clock inputs that can
be used for connecting to an external function generator. The FPGA MRCC pins are
connected to the SMA connectors as shown in
Table 1-7: Differential SMA Clock Connections
Pin Function
AG29 USER CLOCK_1_P
AH29 USER CLOCK_1_N
D17 USER CLOCK_2_P
D18 USER CLOCK_2_N

SuperClock-2 Module

Callout 22,
The SuperClock-2 module connects to the clock module interface connector (J82) and
provides a programmable, low-noise and low-jitter clock source for the KC724 board. The
clock module maps to FPGA I/O by way of 24 control pins, 3 LVDS pairs, 1 regional clock
pair, and 1 reset pin.
interface. The KC724 board also supplies UTIL_5V0, UTIL_3V3, UTIL_2V5 and VCCO_HR
input power to the clock module interface.
Table 1-8: SuperClock-2 FPGA I/O Mapping
FPGA (U1)
Pin Function
F11 Clock recovery
E11 Clock recovery
C12 Clock recovery
20
Send Feedback
Figure 1-2).
Direction IOSTANDARD
Input LVDS
Input LVDS
Figure 1-2.
FPGA (U1)
Direction IOSTANDARD
Input
Input
Input
Input
Figure 1-2.
Table 1-8
Direction IOSTANDARD
Input LVDS_25
Input LVDS_25
Input LVDS_25
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Table 1-6 lists the FPGA pin connections to the
Schematic Net
Name
Pin
LVDS_OSC_P 4 200 MHz LVDS oscillator
LVDS_OSC_N 5 201 MHz LVDS oscillator
Table 1-7.
Schematic Net Name
LVDS_25 CLK_DIFF_1_P
LVDS_25 CLK_DIFF_1_N
LVDS_25 CLK_DIFF_2_P
LVDS_25 CLK_DIFF_2_N
shows the FPGA I/O mapping for the SuperClock-2 module
Schematic Net
Name
Pin
CM_LVDS1_P 1
CM_LVDS1_N 3
CM_LVDS2_P 9
KC724 GTX Transceiver Characterization Board
Device (U35)
Function Direction
Output
Output
SMA Connector
J99
J100
J98
J101
J82 Pin
Function Direction
Clock recovery Output
Clock recovery Output
Clock recovery Output
UG932 (v2.2) October 10, 2014