Kintex-7 Fpga; Fpga Configuration; Sw13 Default Settings - Xilinx KC705 User Manual

Table 1-1: KC705 Board Component Descriptions (Cont'd)
Reference
Callout
Designator
34 J60
35 J39
36 J49
37 SW7
Jumper header locations are identified in
Note:

Kintex-7 FPGA

[Figure 1-2, callout 1]
The KC705 board is populated with the Kintex-7 XC7K325T-2FFG900C FPGA.
For further information on Kintex-7 FPGAs, see

FPGA Configuration

The KC705 board supports three of the five 7 series FPGA configuration modes:
• Master SPI flash memory using the onboard Quad SPI flash memory
• Master BPI flash memory using the onboard Linear BPI flash memory
• JTAG using a standard-A to micro-B USB cable for connecting the host PC to the KC705
board configuration port
Each configuration interface corresponds to one or more configuration modes and bus
widths as listed in
4, and 5 respectively as shown in
X-Ref Target - Figure 1-3
The default mode setting is M[2:0] = 010, which selects Master BPI at board power-on.
Refer to the Configuration Options, page 80
switch SW13.
KC705 Evaluation Board
UG810 (v1.8) March 20, 2018
Component Description
2 x 7 2 mm shrouded JTAG cable
connector
2 x 5 shrouded PMBus connector
12V power input 2 x 3 connector
CPU Reset Pushbutton
Table 1-2. The mode switches M2, M1, and M0 are on SW13 positions 3,
Figure
ON Position = 1
Figure 1-3: SW13 Default Settings
www.xilinx.com
Chapter 1: KC705 Evaluation Board Features
Notes
Molex 87832-1420
Assman HW10G-0202
Molex 39-30-1060
E-Switch TL3301EP100QG
Appendix A, Default Switch and Jumper
7 Series FPGAs Overview
1-3.
1 2 3 4 5
OFF Position = 0
UG810_c1_03_011112
for detailed information about the mode
Schematic
0381397
Page Number
16
35
35
35
Settings.
(DS180) [Ref 1].
12
Send Feedback