Xilinx KC705 User Manual page 21
Evaluation board
for the kintex-7 fpga
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Also See for KC705:
- User manual (110 pages) ,
- Getting started (24 pages) ,
- User manual (98 pages)
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Table 1-5: BPI Flash Memory Connections to the FPGA (Cont'd)
U1 FPGA Pin
P28
T30
P26
R26
U29
M25
M24
B10
U63.6
M30
A10
Additional FPGA bitstreams can be stored and used for configuration by setting the Warm
Boot Start Address (WBSTAR) register contained in 7 series FPGAs. More information is
available in the reconfiguration and multiboot section in 7 Series FPGAs Configuration
User Guide (UG470)
the Master BPI configuration mode.
KC705 Evaluation Board
UG810 (v1.8) March 20, 2018
Net Name
FLASH_D12
FLASH_D13
FLASH_D14
FLASH_D15
FLASH_WAIT
FPGA_FWE_B
FLASH_OE_B
FPGA_CCLK
FLASH_CE_B
FLASH_ADV_B
FPGA_INIT_B
[Ref
2]. The configuration section in this document provides details on
www.xilinx.com
Chapter 1: KC705 Evaluation Board Features
U58 BPI Flash Memory
I/O Standard
Pin Number
LVCMOS25
LVCMOS25
LVCMOS25
LVCMOS25
LVCMOS25
LVCMOS25
LVCMOS25
LVCMOS25
LVCMOS25
LVCMOS25
LVCMOS25
Pin Name
F5
DQ12
H5
DQ13
G7
DQ14
E7
DQ15
F7
WAIT
G8
WE_B
F8
OE_B
E6
CLK
B4
CE_B
F6
ADV_B
D4
RST_B
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