Xadc Header J46 Pinout; Xadc Header (J46) - Xilinx KC705 User Manual

Jumper J47 can be used to select either an external differential voltage reference
(XADC_VREF) or on-chip voltage reference (jumper J47 2–3) for the analog-to-digital
converter.
For external measurements an XADC header (J46) is provided. This header can be used to
provide analog inputs to the FPGA dedicated VP/VN channel, and to the
VAUXP[0]/VAUXN[0], VAUXP[8]/VAUXN[8] auxiliary analog input channels. Simultaneous
sampling of Channel 0 and Channel 8 is supported.
A user-provided analog signal multiplexer card can be used to sample additional external
analog inputs using the 4 GPIO pins available on the XADC header as multiplexer address
lines. Figure 1-38
X-Ref Target - Figure 1-38
XADC_VCC5V0
VADJ
Table 1-34 describes the XADC header J46 pin functions.
Table 1-34: XADC Header J46 Pinout
Net Name
VN, VP
XADC_VAUX0P, N
XADC_VAUX8N, P
DXP, DXN
XADC_AGND
XADC_VREF
XADC_VCC5V0
XADC_VCC_HEADER
VADJ
KC705 Evaluation Board
UG810 (v1.8) March 20, 2018
shows the XADC header connections.
XADC_VN
XADC_VAUX0P
XADC_VAUX8N
XADC_DXP
XADC_VREF
XADC_GPIO_1
XADC_GPIO_3
Figure 1-38: XADC Header (J46)
J46 Pin
Number
1, 2 Dedicated analog input channel for the XADC.
3, 6 Auxiliary analog input channel 0. Also supports use as I/O inputs when
anti alias capacitor is not present.
7, 8 Auxiliary analog input channel 8. Also supports use as I/O inputs when
anti alias capacitor is not present.
9, 12 Access to thermal diode.
4, 5, 10 Analog ground reference.
11 1.25V reference from the board.
13 Filtered 5V supply from board.
14 Analog 1.8V supply for XADC.
15 VCCO supply for bank which is the source of DIO pins.
www.xilinx.com
Chapter 1: KC705 Evaluation Board Features
J46
1 2
3 4
5 6 XADC_VAUX0N
7 8 XADC_VAUX8P
9 10
11 12
XADC_VCC_HEADER
13 14
15 16
XADC_GPIO_0
17 18
XADC_GPIO_2
19 20
GND
XADC_AGND XADC_AGND
Description
XADC_VP
XADC_DXN
UG810_c1_38_031214
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