termination resistor). The user-provided 2.5V differential clock circuit is shown in
Figure
1-12.
X-Ref Target - Figure 1-12
GTX SMA Clock Input
[Figure
1-2, callout 10]
The KC705 board includes a pair of SMA connectors for a GTX clock wired to GTX Quad bank
117. This differential clock has signal names SMA_MGT_REFCLK_P and SMA_REFCLK_N,
which are connected to FPGA U1 pins J8 and J7 respectively.
AC-coupled clock circuit.
•
External user-provided GTX reference clock on SMA input connectors
•
Differential Input
X-Ref Target - Figure 1-13
KC705 Evaluation Board
UG810 (v1.8) March 20, 2018
J11
SMA
Connector
J12
SMA
Connector
Figure 1-12: User SMA Clock Source
J16
SMA_MGT_REFCLK_C_P
SMA
Connector
J15
GND
SMA_MGT_REFCLK_C_N
SMA
Connector
GND
Figure 1-13: GTX SMA Clock Source
www.xilinx.com
Chapter 1: KC705 Evaluation Board Features
USER_SMA_CLOCK_P
GND
USER_SMA_CLOCK_N
GND
UG810_c1_12_031214
Figure 1-13
C11
SMA_MGT_REFCLK_P
0.01 μF 25V
X7R
C10
SMA_MGT_REFCLK_N
0.01 μF 25V
X7R
shows this
UG810_c1_13_031214
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