Firmware Processor (FP)
Firmware Processors (FP) are required when more than two PIMs/Modular Chassis (MC)
are used. The FP provides supervision and status analysis of line/trunk ports, which reside
in the MC or PIM. The FP provides the bus interface for I/O Bus, PCM Bus, and Alarm
Bus in a multiple-PIM configuration. The major specifications of the FP are shown
below:
Central Processor Unit: 16-bit (25 MHz)
Memory: Program Area (384 kb), Work Area (384 kb)
BS01 Function
7.2 Power
7.2.1 AC Power Requirements
AC Input Voltage
AC Input Current
7.2.2 AC Power Consumption / Thermal Output (Maximum
DESCRIPTION
1-PIM
2-PIM
3-PIM
4-PIM
5-PIM
6-PIM
7-PIM
8-PIM
7.2.3 Battery Requirements
Max. Battery Capacity
DC Input Voltage for Battery
Built-in Battery Requirements
Physical Size of Built-in Battery
(one 12V battery)
7.2.4 Operating Environment
DESCRIPTION
UNIVERGE NEAX 2000 IPS General Description
Issue 5
Name Code
PN-CP15
DESCRIPTION
AC Power Consumption (KVA)
100V
0.35
0.70
1.05
1.40
1.75
2.10
2.45
2.80
DESCRIPTION
Remarks
Firmware Processor Card used with the
.
S O P HO 200 0 I PS
SPECIFICATIONS
90 to 132Vac or 180 to 264Vac; 47 to 64Hz
3.5A(at 100V), 2.0A(at 200V)
200V
0.40
0.80
1.20
1.60
2.00
2.40
2.80
3.20
260AH per 4 PIM (65AH (12V) x 8)
-24V
3.4AH (12V) x 2 (approx. 30min. backup)
133(W ) x 60(H) x 67(D) mm
SPECIFICATIONS
CHAPTER 3 TERMINALS
Thermal Output (BTU)
100V
1,195
2,389
3,584
4,778
5,973
7,167
8,362
9,556
SPECIFICATIONS
Page 222
200V
1,365
2,730
4,096
5,461
6,826
8,191
9,556
10,922