25 Mhz Bandwidth I.f. System Block Diagram - Keysight n9020a Service Manual

25 MHz BW IF SYSTEM BLOCK DIAGRAM
W15 (1)
From A13J7
(2)
From A15J900
W37
A2 ANALOG IF
12 MHz
322.5 MHz IN
1 dB
J100
Step
+13 dB
25 MHz
IF COMB CAL
300 kHz
20 dB
P/O
J820 COMB IN J300
W14
From
A16J711
FOOTNOTES
(1) Units without any of the following options: CR3, CRP
(2) Units with any of the following options: CR3, CRP
blockm40_if25
To A3
300 kHz/800 kHz
LC
25 MHz
+13 dB
22.5 MHz
22.5 MHz
to mux
XTAL
9 kHz/60 kHz
TRIG
GAIN
LVL
BURST CARRIER
TRIGGER
300 MHZ LO AIF TRIG
+10 dBm P/O J820
P/O W2
A3 DIGITAL IF
W12
J14
From
A16J710
10 MHz LVDS
J601
J15
22.5 MHz IF
22.5 MHz W13
+4 dBm
12 MHz
J10
TRIGGER 1
IN (BNC)
J9
TRIGGER 2
IN (BNC)
Line Trig
Trig 1
Trig 2
AIF TRIG
SETTLED
INTERP TRIG
Interp Cal
COMB
P/O
P/O W2
J100
AIF TRIG
10 MHz
Capture
Memory
X3 X3
ADC
Sum
Digital
Signal
Processing
Dither
Gate Arm
Gate Trigger
Sweep
Trigger
Orchestration
MUX
Sweep Arm
Sweep Trigger
SPI Engine
PCI
J13
10 MHz OUT
(BNC)
IF 10 MHz REF
J11 NOISE SOURCE
DRIVE +28V
Noise
(BNC)
Source
Drive
SNS NOISE
SOURCE
Recon
J5
ANALOG OUT
(BNC)
DAC
Comb (to A16 via P1)
DIGITAL BUS
J7
TRIGGER 1 OUT
(BNC)
J6
TRIGGER 2 OUT
(BNC)
INT_SWP
Pulse Stretcher
ILB
PCI
J8
SYNC
(BNC)
25 MHz BW IF SYSTEM
BLOCK DIAGRAM