ADTRAN IQ 710 System Manual page 43

C >DTE P
ONFIGURATION
N - Clock for DTE's transmit data normal phase.
ORMAL
I - Clock for DTE's transmit data inverted phase. May be used in high speed circuits (>512
NVERTED
kbps) when the DTE's V.35 interface has high delay. This is usually indicated by HDLC errors on the
IQ 710's DTE port.
E - Clock for the DTE's transmit data is derived from the external DTE device connected to
XTERNAL
the IQ 710.
C >DTE P
ONFIGURATION
Use the following selections to configure timeout intervals and error thresholds, and to configure PVC
management settings.
C >DTE P
ONFIGURATION
Set the timeout (in seconds) between polling intervals. This parameter needs to be a few seconds longer
than the T391 setting of the attached frame relay device. Range is 5 to 30 seconds.
C >DTE P
ONFIGURATION
These parameters define the error threshold for the UNI (user to network interface) formed by the IQ 710
DTE port and the attached frame relay device. If the error threshold is met, the signaling state status is
changed to down, which indicates a service-affecting condition. This condition is cleared once N393 con-
secutive error-free events are received. N392 defines the number of errors required in a given event win-
dow, while N393 defines the number of polling events in each window.
For example:
If N392=3 and N393=4, then if three errors occur within any four events, the interface is determined inac-
tive.
The status of the connection can be viewed in the V
(see Stats Menu on page 59). The status returns to A
C >DTE P
ONFIGURATION
To use local PVC management, enter the management data link connection identifier (DLCI). The M
DLCI is a special DLCI used between the attached DTE device and the IQ 710 to carry SNMP
AGEMENT
and Telnet packets to/from the IQ 710 on the DTE port.
Guidelines for Configuring Management DLCI
If the attached router or FRAD is used to route SNMP/Telnet frames to the IQ 710, set the
M
ANAGEMENT
between the router/FRAD and the IQ 710. The router/FRAD must also be configured to route the
IQ 710 IP address to this DLCI. The IP A
must also be set in the S
© 2002 ADTRAN, Inc.
>P L
ORT HYSICAL
>F R
ORT RAME ELAY
>F R
ORT RAME ELAY
>F R
ORT RAME ELAY
>F R
ORT RAME ELAY
DLCI to a unique value (between 16 and 1007) that identifies the virtual circuit
C
YSTEM ONFIGURATION
O >TC C
AYER PTIONS
O
PTIONS
O >T392
PTIONS
O >N392
PTIONS AND
S >DTE P
IEW TATISTICS
once the threshold is no longer exceeded.
CTIVE
O >M
PTIONS ANAGEMENT
and S
DDRESS UBNET
menu.
61202800L1-1B
Section 4, User Interface Guide
O
LOCK PTION
N393
>S S
ORT IGNAL TATE
DLCI
M
for the DTE (
V.35
ASK
IQ 710 System Manual
IQ 710
Page 43
menu
-
AN
) port