68000 and 68010
CPU Package: 68-pin PGA
(68-pin PGA)
Accessories Required: HP
103llG
Preprocessor
Maximum Clock Speed: 12.5 MHz clock input
Signal Line Loading: 100 kQ + 10 pF on any line
Microprocessor Cycles Identified: User data read/write
User program read
Supervisor read/write
Supervisor program read
Interrupt acknowledge
Bus Grant
6800
cycle
Additional Capabilities: The logic analyzer captures all bus cycles
including prefetches.
Maximum Power Required: None
Logic Analyzer Required: HP 1652B
Number of Probes Used: Three 16-channel probes
Microprocessor Specific Measurements
A-14
HP 16528/1653B
Front-Panel Reference
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