HP 1652B Getting Started Manual page 612

-
2. Adjust the pulse generator for the output in figure 3-27.
I+-- 60NS -+
1
----
3.2v
+ 10NS
CLOCK OUTPUT B
L 1 ----
I
Ov
I
I
'1120NS ------WI
I I
I
I
----
3.2v
I I
DATA,OUTPUT A
----
I
Ov
40NS -+ I+- 60NS -+I I+- 20NS
0165OW14
Figure
3-27.
Waveform for Data Test 6
Setting for HP 8161A:
Parameter Output A
Output B
Input Mode
Norm
w-m
Period (PER)
120 ns
e-e
Width (WID) 60 ns
Ions
Leading Edge (LEE) 1 ns
1 ns
Trailing Edge (TRE)
1 ns 1 ns
High Level (HIL)
3.2V .
3.2
V
Low Level (LOL)
ov ov
Delay (DEL) 40
ns ns
Double Pulse (DBL)
---
60
ns
Output Mode
ENABLE ENABLE
3.
Assign the pod under test to
Analyzer 1 in
the
System Configuration as
in
the previous figure 3-5.
4.
Set up the
State Format Specification
as in figure 3-28. Assign the falling
J
clock as the
Master Clock
and the rising J clock as the
Slave
Clock. Refer to
steps a through d if you are unfamiliar with the menus.
I
[-I-
State Fomet Speclllcation
I
Hester Cl ctck
Slave Clock
[ JA
1
[ Jt 1
-
Specify Symbols
Clock Period
1'601
hctivity >
Lobe1 P-01
Pod 1
HP
1652B/1653B
Service Manual
Figure
3-28.
Format Specification for Data Test 6
Performance Tests
3-25