Radyne MM200 Installation And Operation Manual page 49

MM200 High-Speed Microwave Modem
MDD1 PLLLOCK
MDD2 PLLLOCK
MDD3 PLLLOCK
MAJOR RX (menu)
DMD HW GLUE
DMD HW DATA
SIGNAL LOCK
SYNC LOCK
DAT PLL LOCK
DIVERSITY FPGA
DDD0 HW FPGA
DDD1 HW FPGA
DDD2 HW FPGA
DDD3 HW FPGA
DDD0 PLLLOCK
DDD1 PLLLOCK
DDD2 PLLLOCK
DDD3 PLLLOCK
MAJOR MUX (menu)
MUX HW FPGA
INT0 HW FPGA
INT2 HW FPGA
INT3 HW FPGA
INT4 HW FPGA
TM086 - Rev. 4.1
{Masked, Unmasked}
RF PLL not locked.
{Masked, Unmasked}
RF PLL not locked.
{Masked, Unmasked}
RF PLL not locked.
An alarm that will terminate reception.
Red LED will illuminate.
FPGA failure.
FPGA failure.
Monitors the system signal lock states.
Monitors the system sync lock states.
Monitors the data PLL lock states.
FPGA failure.
FPGA failure.
FPGA failure.
FPGA failure.
FPGA failure.
RF PLL not locked.
RF PLL not locked.
RF PLL not locked.
RF PLL not locked.
An alarm that will terminate mux
operations. Red LED will illuminate.
FPGA failure.
FPGA failure.
FPGA failure.
FPGA failure.
FPGA failure.
User Interfaces
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