Radyne MM200 Installation And Operation Manual page 124

Appendix A
<1> APC Control
<1> APC Hysteresis
<4> APC Level
<1> Major Alarm1
Status
<1> Major Alarm2
Status
<1> Minor Alarm1
Status
<1> Minor Alarm2
Status
<1> Common Alarm1
Status
<1> Common Alarm2
Status
<1> Latched Major
Alarm1 Status
<1> Latched Major
Alarm2 Status
<1> Latched Minor
Alarm1 Status
<1> Latched Minor
Alarm2 Status
<1> Latched Common
Alarm1 Status
<1> Latched
Common Alarm2
A-24
Sets the APC receive control (Not Yet Implemented)
Sets the APC receive hysteresis level (Not Yet Implemented)
Sets the APC receive level in dBm (Not Yet Implemented)
Status Bytes
0 = Pass, 1 = Fail
Bit 0 = Glue Logic FPGA Fail
Bit 1 = Data FPGA Fail
Bit 2 = Signal Lock Detect
Bit 3 = Sync Lock Detect
Bit 4 = Deframer clock PLL lock detect
Bit 5 = Diversity FPGA fail
Bits 6 – 7 = Spare
0 = Pass, 1 = Fail
Bits 0 – 7 = Spare
0 = Pass, 1 = Fail
Bits 0 – 7 = Spare
0 = Pass, 1 = Fail
Bits 0 – 7 = Spare
0 = Pass, 1 = Fail
Bit 0 = Glue Logic FPGA Fail
Bit 1 = Data FPGA Fail
Bits 2 – 7 = Spare
0 = Pass, 1 = Fail
Bits 0 – 7 = Spare
0 = Pass, 1 = Fail
Bit 0 = Glue Logic FPGA Fail
Bit 1 = Data FPGA Fail
Bit 2 = Signal Lock Detect
Bit 3 = Sync Lock Detect
Bit 4 = Deframer clock PLL lock detect
Bit 5 = Diversity FPGA fail
Bits 6 – 7 = Spare
0 = Pass, 1 = Fail
Bits 0 – 7 = Spare
0 = Pass, 1 = Fail
Bits 0 – 7 = Spare
0 = Pass, 1 = Fail
Bits 0 – 7 = Spare
0 = Pass, 1 = Fail
Bit 0 = Glue Logic FPGA Fail
Bit 1 = Data FPGA Fail
Bits 2 – 7 = Spare
0 = Pass, 1 = Fail
Bits 0 – 7 = Spare
MM200 High-Speed Microwave Modem
TM086 – Rev. 4.1