Sbusn1-Secondary Bus Number (D1:F0); Subusn1-Subordinate Bus Number (D1:F0) - Intel 925 - Pentium D 925 3.0GHz 800MHz 4MB-Cache Socket 775 CPU Datasheet

Host-PCI Express* Graphics Bridge Registers (D1:F0)
8.1.10 SBUSN1—Secondary Bus Number (D1:F0)
PCI Device:
Address Offset:
Default Value:
Access:
Size:
This register identifies the bus number assigned to the second bus side of the "virtual" bridge i.e.
to PCI Express Graphics. This number is programmed by the PCI configuration software to allow
mapping of configuration cycles to PCI Express Graphics.
Bit
7:0
8.1.11 SUBUSN1—Subordinate Bus Number (D1:F0)
PCI Device:
Address Offset:
Default Value:
Access:
Size:
This register identifies the subordinate bus (if any) that resides at the level below PCI Express
Graphics. This number is programmed by the PCI configuration software to allow mapping of
configuration cycles to PCI Express Graphics.
Bit
7:0
118
Access &
Default
R/W Secondary Bus Number (BUSN): This field is programmed by configuration
00h software with the bus number assigned to PCI Express*-G.
Access &
Default
R/W Subordinate Bus Number (BUSN): This register is programmed by
00h configuration software with the number of the highest subordinate bus that lies
behind the device 1 bridge. When only a single PCI device resides on the PCI
Express*-G segment, this register will contain the same value as the SBUSN1
register.
1
19h
00h
RO
8 bits
Description
1
1Ah
00h
R/W
8 bits
Description
®
Intel 82925X/82925XE MCH Datasheet
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