Table 10-5. Dram Address Translation (Dual Channel Symmetric Mode) - Intel 925 - Pentium D 925 3.0GHz 800MHz 4MB-Cache Socket 775 CPU Datasheet

Express chipset for the intel 82925x/82925xe memory controller hub (mch)
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Functional Description

Table 10-5. DRAM Address Translation (Dual Channel Symmetric Mode)

31
256 Mb x16 4i
4 KB
128 MB
256 Mb x8
4i
8 KB
256 MB
512 Mb x16 4i
8 KB
256 MB
512 Mb x8
4i
16 KB
512 MB
512 Mb x16 4i
4 KB
256 MB
512 Mb x8
4i
8 KB
512 MB
1 Gb x16
4i
8 KB
512 MB
1 Gb x8
4i
16 KB
1 GB
1 Gb x16
8i
4 KB
512 MB
1 Gb x8
8i
8 KB
1 GB
NOTES:
1. b – 'bank' select bit
2. c – 'column' address bit
3. h – channel select bit
4. r – 'row' address bit
180
30
29
28
27
26
25
24
23
r10
r9
r8
r7
r6
r12
r10
r9
r8
r7
r6
r12
r10
r9
r8
r7
r6
r11
r12
r10
r9
r8
r7
r6
r12
r10
r9
r8
r7
r6
r13
r12
r10
r9
r8
r7
r6
r13
r12
r10
r9
r8
r7
r6
r13
r11
r12
r10
r9
r8
r7
r6
r11
r12
r10
r9
r8
r7
r6
r13
r11
r12
r10
r9
r8
r7
r6
22
21
20
19
18
17
16
15
r5
r4
r3
r2
r1
r0
r11
r12
r5
r4
r3
r2
r1
r0
r11
b1
r5
r4
r3
r2
r1
r0
r11
b1
r5
r4
r3
r2
r1
r0
b0
b1
r5
r4
r3
r2
r1
r0
r11
b1
r5
r4
r3
r2
r1
r0
r11
b1
r5
r4
r3
r2
r1
r0
r11
b1
r5
r4
r3
r2
r1
r0
b0
b1
r5
r4
r3
r2
r1
r0
b0
b1
r5
r4
r3
r2
r1
r0
b0
b1
14
13
12
11
10
9
8
7
b0
b1
c8
c7
c6
c5
c4
c3
b0
c9
c8
c7
c6
c5
c4
c3
b0
c9
c8
c7
c6
c5
c4
c3
c11 c9
c8
c7
c6
c5
c4
c3
b0
c9
c8
c7
c6
c5
c4
c3
b0
c9
c8
c7
c6
c5
c4
c3
b0
c9
c8
c7
c6
c5
c4
c3
c11 c9
c8
c7
c6
c5
c4
c3
b2
c9
c8
c7
c6
c5
c4
c3
b2
c9
c8
c7
c6
c5
c4
c3
®
Intel
82925X/82925XE MCH Datasheet
R
6
5
4
3
h
c2
c1
c0
h
c2
c1
c0
h
c2
c1
c0
h
c2
c1
c0
h
c2
c1
c0
h
c2
c1
c0
h
c2
c1
c0
h
c2
c1
c0
h
c2
c1
c0
h
c2
c1
c0

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