C1Drb0-Channel B Dram Rank Boundary Address 0; C1Drb1-Channel B Dram Rank Boundary Address 1; C1Drb2-Channel B Dram Rank Boundary Address 2; C1Drb3-Channel B Dram Rank Boundary Address 3 - Intel 925 - Pentium D 925 3.0GHz 800MHz 4MB-Cache Socket 775 CPU Datasheet

MCHBAR Registers
5.1.11 C1DRB0—Channel B DRAM Rank Boundary Address 0
MMIO Range:
Address Offset:
Default Value:
Access:
Size:
The operation of this register is detailed in the description for register C0DRB0.
5.1.12 C1DRB1—Channel B DRAM Rank Boundary Address 1
MMIO Range:
Address Offset:
Default Value:
Access:
Size:
The operation of this register is detailed in the description for register C0DRB0.
5.1.13 C1DRB2—Channel B DRAM Rank Boundary Address 2
MMIO Range:
Address Offset:
Default Value:
Access:
Size:
The operation of this register is detailed in the description for register C0DRB0.
5.1.14 C1DRB3—Channel B DRAM Rank Boundary Address 3
MMIO Range:
Address Offset:
Default Value:
Access:
Size:
The operation of this register is detailed in the description for register C0DRB0.
5.1.15 C1DRA0—Channel B DRAM Rank 0,1 Attribute
MMIO Range:
Address Offset:
Default Value:
Access:
Size:
The operation of this register is detailed in the description for register C0DRA0.
90
MCHBAR
180h
00h
R/W
8 bits
MCHBAR
181h
00h
R/W
8 bits
MCHBAR
182h
00h
R/W
8 bits
MCHBAR
183h
00h
R/W
8 bits
MCHBAR
188h
00h
R/W
8 bits
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Intel 82925X/82925XE MCH Datasheet
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