Intrline1-Interrupt Line (D1:F0); Intrpin1-Interrupt Pin (D1:F0) - Intel 925 - Pentium D 925 3.0GHz 800MHz 4MB-Cache Socket 775 CPU Datasheet

Express chipset for the intel 82925x/82925xe memory controller hub (mch)
Hide thumbs Also See for 925 - Pentium D 925 3.0GHz 800MHz 4MB-Cache Socket 775 CPU:
Table of Contents

Advertisement

R
8.1.20
INTRLINE1—Interrupt Line (D1:F0)
PCI Device:
Address Offset:
Default Value:
Access:
Size:
This register contains interrupt line routing information. The device itself does not use this value;
rather device drivers and operating systems use it to determine priority and vector information.
Bit
7:0
8.1.21
INTRPIN1—Interrupt Pin (D1:F0)
PCI Device:
Address Offset:
Default Value:
Access:
Size:
This register specifies which interrupt pin this device uses.
Bit
7:0
®
Intel
82925X/82925XE MCH Datasheet
Access &
Default
R/W
Interrupt Connection: This field is used to communicate interrupt line routing
00h
information. POST software writes the routing information into this register as it
initializes and configures the system. The value in this register indicates which
input of the system interrupt controller this device's interrupt pin is connected to.
Access &
Default
RO
Interrupt Pin: As a single function device, the PCI Express* device specifies
01h
INTA as its interrupt pin.
01h = INTA
Host-PCI Express* Graphics Bridge Registers (D1:F0)
1
3Ch
00h
R/W
8 bits
Description
1
3Dh
00h
RO
8 bits
Description
125

Hide quick links:

Advertisement

Table of Contents
loading

This manual is also suitable for:

925x925xe82925x82925xe

Table of Contents