C0Drb1-Channel A Dram Rank Boundary Address 1; C0Drb2-Channel A Dram Rank Boundary Address 2; C0Drb3-Channel A Dram Rank Boundary Address 3 - Intel 925 - Pentium D 925 3.0GHz 800MHz 4MB-Cache Socket 775 CPU Datasheet

MCHBAR Registers
5.1.2 C0DRB1—Channel A DRAM Rank Boundary Address 1
MMIO Range:
Address Offset:
Default Value:
Access:
Size:
The operation of this register is detailed in the description for register C0DRB0.
5.1.3 C0DRB2—Channel A DRAM Rank Boundary Address 2
MMIO Range:
Address Offset:
Default Value:
Access:
Size:
The operation of this register is detailed in the description for register C0DRB0.
5.1.4 C0DRB3—Channel A DRAM Rank Boundary Address 3
MMIO Range:
Address Offset:
Default Value:
Access:
Size:
The operation of this register is detailed in the description for register C0DRB0.
82
MCHBAR
101h
00h
R/W
8 bits
MCHBAR
102h
00h
R/W
8 bits
MCHBAR
103h
00h
R/W
8 bits
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Intel 82925X/82925XE MCH Datasheet
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