System Memory Timing Support; System Memory Organization Modes; Table 2-2 Ddr3 System Memory Timing Support - Intel P4000 - DATASHEET REV 001 Datasheet

Mobile processor
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Table 2-1. Supported SO-DIMM Module Configurations
Raw
DIMM
Card
Capacity
Version
Technology
2
D
4 GB
F
2 GB
F
4 GB
NOTES:
1.
System memory configurations are based on availability and are subject to change.
2.
Only Raw Card D SO-DIMMs at 1066 MT/s are supported.
2.1.2

System Memory Timing Support

The IMC supports the following DDR3 Speed Bin, CAS Write Latency (CWL), and
command signal mode timings on the main memory interface:
tCL = CAS Latency
tRCD = Activate Command to READ or WRITE Command delay
tRP = PRECHARGE Command Period
CWL = CAS Write Latency
Command Signal modes = 1n indicates a new command may be issued every clock
and 2n indicates a new command may be issued every 2 clocks. Command launch
mode programming depends on the transfer rate and memory configuration.
Table 2-2. DDR3 System Memory Timing Support
Transfer
Rate
(MT/s)
800
1066
NOTES:
1.
System memory timing support is based on availability and is subject to change.
2.1.3

System Memory Organization Modes

The IMC supports two memory organization modes, single-channel and dual-channel.
Depending upon how the SO-DIMM Modules are populated in each memory channel, a
number of different configurations can exist.
Datasheet
DRAM
DRAM
Device
Organization
2 Gb
256 M x 8
1 Gb
128 M x 8
2 Gb
256 M x 8
tCL
tRCD
(tCK)
(tCK)
6
7
8
1
# of
# of
Physical
DRAM
Device
Devices
Ranks
16
2
16
2
16
2
tRP
(tCK)
(tCK)
6
6
7
7
8
8
# of Row/
# of
Col
Banks
Address
Inside
Bits
DRAM
15/10
8
14/10
8
15/10
8
CWL
CMD Mode
Notes
5
1n
6
1n
Page
Size
8K
8K
8K
1
1
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