System Memory Timing Support; Supported So-Dimm Module Configurations (Aio Only); Ddr3 System Memory Timing Support - Intel 2ND GENERATION CORE PROCESSOR FAMILY DESKTOP - DATASHEET VOLUME 1 01-2011 Datasheet

Table 2-2.

Supported SO-DIMM Module Configurations (AIO Only)

Raw
DIMM DRAM Device
Card
Capacity Technology
Version
1 GB
A
2 GB
1 GB
B
2 GB
512 MB
C
1 GB
2 GB
F 4 GB
8 GB
Notes:
1. System memory configurations are based on availability and are subject to change.
2. Interface does not support ULV/LV memory modulates or ULV/LV DIMMs.
2.1.2

System Memory Timing Support

The IMC supports the following DDR3 Speed Bin, CAS Write Latency (CWL), and
command signal mode timings on the main memory interface:
• t = CAS Latency
CL
• t
RCD
• t = PRECHARGE Command Period
RP
• CWL = CAS Write Latency
• Command Signal modes = 1n indicates a new command may be issued every clock
and 2n indicates a new command may be issued every 2 clocks. Command launch
mode programming depends on the transfer rate and memory configuration.
Table 2-3.

DDR3 System Memory Timing Support

Transfer
Segment
All Desktop
segments
Notes:
1. System memory timing support is based on availability and is subject to change.
20
DRAM
Organization
1 Gb 64 M x 16
2 Gb 128 M x 16
1 Gb 128 M x 8
2 Gb 256 M x 8
1 Gb 64 M x 16
2 Gb 128 M x 16
1 Gb 128 M x 8
2 Gb 256 M x 8
4 Gb 512 M x 8
= Activate Command to READ or WRITE Command delay
tCL
Rate
(tCK)
(MT/s)
7
1066
8
1333 9
# of
# of
Physical
DRAM Row/Col
Device
Devices Address Bits
Ranks
8 2
8 2
8 1
8 1
4 1
4 1
16 2
16 2
16 2
tRCD tRP CWL
(tCK) (tCK) (tCK)
7 7
8 8
9 9
Interfaces
1,2
# of # of Banks
Inside Page Size
DRAM
13/10 8
14/10 8
14/10 8
15/10 8
13/10 8
14/10 8
14/10 8
15/10 8
16/ 10 8
CMD
Notes
DPC Mode
1 1n/2n
6
2 2n
1 1n/2n
6
2 2n
1 1n/2n
7
2 2n
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