Branching Instruction Lines; Branching - Omron CQM1H - PROGRAM Programming Manual

Basic Ladder Diagrams
4-3-8

Branching Instruction Lines

Branching

point
00000
Diagram A: Correct Operation
Branching
point
00000
Diagram B: Incorrect Operation
TR Bits
When an instruction line branches into two or more lines, it is sometimes nec-
essary to use either interlocks or TR bits to maintain the execution condition
that existed at a branching point. This is because instruction lines are exe-
cuted across to a right-hand instruction before returning to the branching point
to execute instructions on a branch line. If a condition exists on any of the
instruction lines after the branching point, the execution condition could
change during this time making proper execution impossible. The following
diagrams illustrate this. In both diagrams, instruction 1 is executed before
returning to the branching point and moving on to the branch line leading to
instruction 2.
00002
00001
00002
If, as shown in diagram A, the execution condition that existed at the branch-
ing point cannot be changed before returning to the branch line (instructions
at the far right do not change the execution condition), then the branch line will
be executed correctly and no special programming measure is required.
If, as shown in diagram B, a condition exists between the branching point and
the last instruction on the top instruction line, the execution condition at the
branching point and the execution condition after completing the top instruc-
tion line will sometimes be different, making it impossible to ensure correct
execution of the branch line.
There are two means of programming branching programs to preserve the
execution condition. One is to use TR bits; the other, to use interlocks (IL(02)/
IL(03)).
The TR area provides eight bits, TR 0 through TR 7, that can be used to tem-
porarily preserve execution conditions. If a TR bit is placed at a branching
point, the current execution condition will be stored at the designated TR bit.
When returning to the branching point, the TR bit restores the execution sta-
tus that was saved when the branching point was first reached in program
execution.
The previous diagram B can be written as shown below to ensure correct exe-
cution. In mnemonic code, the execution condition is stored at the branching
point using the TR bit as the operand of the OUTPUT instruction. This execu-
tion condition is then restored after executing the right-hand instruction by
using the same TR bit as the operand of a LOAD instruction
Address
Instruction 1
00000
00001
Instruction 2
00002
00003
Instruction 1
Address
00000
Instruction 2
00001
00002
00003
00004
Section 4-3
Instruction Operands
LD 00000
Instruction 1
AND 00002
Instruction 2
Instruction Operands
LD 00000
AND 00001
Instruction 1
AND 00002
Instruction 2
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