Flags/Bits For An Inner Board In Slot 2 (Ir 232 To Ir 243) - Omron CQM1H - PROGRAM Programming Manual

IR Area
3-2-5

Flags/Bits for an Inner Board in Slot 2 (IR 232 to IR 243)

High-speed Counter Board Flags/Bits
Word Bits
IR 232 00 to 15 High-speed
Counter 1
IR 233 00 to 15
IR 234 00 to 15 High-speed
Counter 2
IR 235 00 to 15
IR 236 00 to 15 High-speed
Counter 3
IR 237 00 to 15
IR 238 00 to 15 High-speed
Counter 4
IR 239 00 to 15
IR 240 00 to 07 Comparison Results: Internal Output Bits
(High-speed
counter 1)
IR 241 08 to 11 Comparison Results: External Outputs Bits
(High-speed for Outputs 1 to 4
counter 2)
IR 242 12 Counter Operating Flag
(High-speed
counter 3)
13 Comparison Flag
IR 243
(High-speed
counter 4)
14 PV Overflow/Underflow Flag
15 SV Error Flag
AR 05 00 High-speed Counter 1 Reset Bit
01 High-speed Counter 2 Reset Bit
02 High-speed Counter 3 Reset Bit
03 High-speed Counter 4 Reset Bit
04 to 07 Not used.
08 High-speed Counter 1 Comparison Stop Bit 0→1: Starts comparison.
09 High-speed Counter 2 Comparison Stop Bit
10 High-speed Counter 3 Comparison Stop Bit
11 High-speed Counter 4 Comparison Stop Bit
12 High-speed Counter 1 Stop Bit
13 High-speed Counter 2 Stop Bit
14 High-speed Counter 3 Stop Bit
15 High-speed Counter 4 Stop Bit
AR 06 00 External Output 1 Force-set Bit
01 External Output 2 Force-set Bit
02 External Output 3 Force-set Bit
03 External Output 4 Force-set Bit
04 External Output Force-set Enable Bit
05 to 15 Not used.
158
Name
PV (rightmost 4 digits)
PV (leftmost 4 digits)
PV (rightmost 4 digits)
PV (leftmost 4 digits)
PV (rightmost 4 digits)
PV (leftmost 4 digits)
PV (rightmost 4 digits)
PV (leftmost 4 digits)
Function
Contains the high-speed counter PV for
each of the High-speed Counter Board's
ports.
Note The PV data format (BCD or hexa-
decimal) can be set in the PC Set-
up (DM 6602.)
Contains the bit pattern specified by oper-
and in CTBL(––) when conditions are sat-
isfied.
Contains the bit pattern specified by oper-
and in CTBL(––) when conditions are sat-
isfied.
0: Stopped
1: Operating
Indicates whether comparison is in
progress.
0: Stopped; 1: Operating
0: Normal
1: Overflow or underflow occurred.
0: Normal
1: SV error occurred.
Phase Z and software reset
0: Phase-Z reset disabled
1: Phase-Z reset enabled
Software reset only
0: Software reset disabled
0→1: Executes software reset
1→0: Stops comparison.
0: Continues operation.
1: Stops operation.
0: No effect on output status
1: Forces output ON
1: Force-setting of outputs 1 to 4 enabled
0: Force-setting of outputs 1 to 4 disabled
Section 3-2
Read/
Write
R
R
R
R
R
R
R