Expansion Instructions; Alphabetic List By Mnemonic - Omron CQM1H - PROGRAM Programming Manual

Instruction Tables
Left
digit
0 1
5 (@) ADB (@) SBB
BINARY ADD BINARY SUB-
TRACT
6
(Expansion (Expansion
Instruction) Instruction)
7 (@) XFER (@) BSET
BLOCK BLOCK SET
TRANSFER
8 (@) DIST (@) COLL
SINGLE DATA
WORD COLLECT
DISTRIBUTE
9 (@) SEND (@) SBS
NETWORK SUBROUTINE
SEND ENTRY
5-7-2

Expansion Instructions

Mnemonic Code
ASFT 17
TKY 18
MCMP 19
RXD 47
TXD 48
CMPL 60
INI 61
PRV 62
CTBL 63
SPED 64
PULS 65
SCL 66
BCNT 67
BCMP 68
STIM 69
DSW 87
7SEG 88
INT 89
5-7-3

Alphabetic List by Mnemonic

218
2 3
(@) MLB (@) DVB (@) ADDL
BINARY MUL- BINARY DOUBLE BCD
TIPLY DIVIDE ADD
(Expansion (Expansion (Expansion
Instruction) Instruction) Instruction)
(@) ROOT (@) XCHG (@) SLD
SQUARE DATA ONE DIGIT
ROOT EXCHANGE SHIFT LEFT
(@) MOVB (@) MOVD (@) SFTR
MOVE BIT MOVE DIGIT REVERSIBLE
SHIFT REGIS-
TER
SBN RET ---
SUBROUTINE SUBROUTINE
DEFINE RETURN
The 74 expansion instructions that can be used are listed below, along with
the default function codes that are assigned when the CQM1H is shipped.
Refer to 1-4 Interrupt Functions for more details.
Mnemonic Code
ACC ---
ACOS ---
ADBL ---
APR ---
ASIN ---
ATAN ---
AVG ---
CMND ---
COLM ---
COS ---
CPS ---
CPSL ---
DBS ---
DBSL ---
DEG ---
EXP ---
FCS ---
FIX ---
Dashes ("–") in the Code column indicate expansion instructions, which do not
have fixed function codes. "None" indicates instructions for which function
codes are not used. The @ symbol indicates instructions with differentiated
forms.
Mnemonic Code
7SEG 88
ACC (@) ––
ACOS (@) ––
ADB (@) 50
ADBL (@) ––
ADD (@) 30
Right digit
4 5 6
(@) SUBL (@) MULL
DOUBLE BCD DOUBLE BCD
SUBTRACT MULTIPLY
(Expansion (Expansion
Instruction) Instruction)
(@) SRD (@) MLPX
ONE DIGIT 4-TO-16
SHIFT RIGHT DECODER
(@) TCMP (@) ASC
TABLE ASCII
COMPARE CONVERT
--- ---
Mnemonic Code
FIXL ---
FLT ---
FLTL ---
FPD ---
HEX ---
HKY ---
HMS ---
LINE ---
LOG ---
MAX ---
MBS ---
MBSL ---
MIN ---
NEG ---
NEGL ---
PID ---
PLS2 ---
PMCR ---
PWM ---
Words
4 7-SEGMENT DISPLAY OUTPUT
4 ACCELERATION CONTROL
3 ARC COSINE
4 BINARY ADD
4 DOUBLE BINARY ADD
4 BCD ADD
Section 5-7
7 8
(@) DIVL (@) BINL (@) BCDL
DOUBLE BCD DOUBLE BCD- DOUBLE
DIVIDE TO-DOUBLE BINARY-TO-
BINARY DOUBLE BCD
(Expansion (Expansion (Expansion
Instruction) Instruction) Instruction)
(@) DMPX (@) SDEC ---
16-TO-4 7-SEGMENT
ENCODER DECODER
(Expansion (Expansion (Expansion
Instruction) Instruction) Instruction)
(@) IORF (@) RECV (@) MCRO
I/O NETWORK MACRO
REFRESH RECEIVE
Mnemonic Code
RAD ---
SBBL ---
SCL2 ---
SCL3 ---
SEC ---
SIN ---
SQRT ---
SRCH ---
STUP ---
SUM ---
TAN ---
TTIM ---
XFRB ---
ZCP ---
ZCPL ---
/F ---
+F ---
–F ---
*F
---
Name
424
400
366
328
332
317
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