Omron CQM1H - PROGRAM Programming Manual page 182

IR Area
Word Bits
IR 208 00 to 07 Comparison Results: Internal Output Bits
(High-speed
counter 1)
IR 209 08 to 11 Comparison Results: External Output Bits
(High-speed for Outputs 1 to 4
counter 2)
IR 210 12 Counter Operating Flag
(High-speed
counter 3)
13 Comparison Flag
IR 211
(High-speed
counter 4)
14 PV Overflow/Underflow Flag
15 SV Error Flag
IR 212 00 High-speed Counter 1 Reset Bit
01 High-speed Counter 2 Reset Bit
02 High-speed Counter 3 Reset Bit
03 High-speed Counter 4 Reset Bit
04 to 07 Not used.
08 High-speed Counter 1 Comparison Stop
Bit
09 High-speed Counter 2 Comparison Stop
Bit
10 High-speed Counter 3 Comparison Stop
Bit
11 High-speed Counter 4 Comparison Stop
Bit
12 High-speed Counter 1 Stop Bit
13 High-speed Counter 2 Stop Bit
14 High-speed Counter 3 Stop Bit
15 High-speed Counter 4 Stop Bit
IR 213 00 External Output 1 Force-set Bit
01 External Output 2 Force-set Bit
02 External Output 3 Force-set Bit
03 External Output 4 Force-set Bit
04 External Output Force-set Enable Bit
05 to 15 Not used.
Analog Setting Board (Slot 1 and 2) Flags/Bits
Word Bits
IR 220 00 to 15 Analog SV 1: 0000 to 0200 (4-digit BCD)
IR 221 00 to 15 Analog SV 2: 0000 to 0200 (4-digit BCD)
IR 222 00 to 15 Analog SV 3: 0000 to 0200 (4-digit BCD)
IR 223 00 to 15 Analog SV 4: 0000 to 0200 (4-digit BCD)
Name
Contains the bit pattern specified by oper-
and in CTBL(––) when conditions are satis-
fied.
Contains the bit pattern specified by oper-
and in CTBL(––) when conditions are satis-
fied.
0: Stopped
1: Operating
Indicates whether comparison is in
progress.
0: Stopped; 1: Operating
0: Normal
1: Overflow or underflow occurred.
0: Normal
1: SV error occurred.
Phase Z and software reset
Software reset only
0→1: Starts comparison.
1→0: Stops comparison.
0: Continues operation.
1: Stops operation.
0: No effect on output status
1: Forces output ON
1: Force-setting of outputs 1 to 4 enabled
0: Force-setting of outputs 1 to 4 disabled
Function
Function
0: Counter not reset on phase Z
1: Counter reset on phase Z
0: Counter not reset
0→1: Counter reset
Section 3-2
Read/
Write
R
R
R
R
R
R
W
---
W
W
W
W
---
Read/
Write
R
R
R
R
157