Omron CP - PROGRAMMING MANUAL 05-2007 Programming Manual page 243

Cp1h/cp1l cpu unit
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Comparison Instructions
Operand Specifications for Instructions for Double-length Data
Description
210
Area
Counter Area
C0000 to C4095
DM Area
D0 to D32767
Indirect DM addresses
@ D0 to @ D32767
in binary
Indirect DM addresses
*D0 to *D32767
in BCD
Constants
#0000 to #FFFF (binary)
&0 to &65535 (unsigned decimal)
Data Registers
DR0 to DR15
Index Registers
---
Indirect addressing
,IR0 to ,IR15
using Index Registers
–2048 to +2047 ,IR0 to –2048 to +2047 ,IR15
DR0 to DR15, IR0 to IR15
,IR0+(++) to ,IR15+(++)
,–(– –)IR0 to, –(– –)IR15
Area
CIO Area
CIO 0 to CIO 6142
Work Area
W0 to W510
Holding Bit Area
H0 to H510
Auxiliary Bit Area
A0 to A958
Timer Area
T0000 to T4094
Counter Area
C0000 to C4094
DM Area
D0 to D32766
Indirect DM addresses
@ D0 to @ D32767
in binary
Indirect DM addresses
*D0 to *D32767
in BCD
Constants
#00000000 to #FFFFFFFF (binary)
&0 to &4294967295 (unsigned decimal)
Data Registers
---
Index Registers
IR0 to IR15 (for unsigned data only)
Indirect addressing
,IR0 to ,IR15
using Index Registers
–2048 to +2047 ,IR0 to –2048 to +2047 ,IR15
DR0 to DR15, IR0 to IR15
,IR0+(++) to ,IR15+(++)
,–(– –)IR0 to, –(– –)IR15
The input comparison instruction compares S
values and creates an ON execution condition when the comparison condition
is true. Unlike instructions such as CMP(020) and CMPL(060), the result of an
input comparison instruction is reflected directly as an execution condition, so
it is not necessary to access the result of the comparison through an Arith-
metic Flag and the program is simpler and faster.
S
1
S
1
and S
as signed or unsigned
1
2
Section 3-6
S
2
S
2

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