Omron CP - PROGRAMMING MANUAL 05-2007 Programming Manual page 222

Timer and Counter Instructions
Note
Operand Specifications
Description
Data
BCD One word for each of 8 timer SV:
#0000 to #9999
Binary One word for each of 8 timer SV:
&0 to &65535 (decimal)
#0000 to #FFFF (hex)
S through S+7 must be in the same data area.
Area
CIO Area
Work Area
Holding Bit Area
Auxiliary Bit Area
Timer Area
Counter Area
DM Area
Indirect DM addresses in
binary
Indirect DM addresses in BCD *D0 to *D32767
Constants
Data Registers
Index Registers
Indirect addressing using
Index Registers
When the execution condition for MTIM(543)/MTIMX(554) is ON and the reset
and timer bits are both OFF, MTIM(543)/MTIMX(554) increments the PV in
D2. If the pause bit is turned ON, the timer will stop incrementing the PV, but
the PV will retain its value. MTIM(543)/MTIMX(554) will resume timing when
the pause bit goes OFF again.
The PV (content of D2) is compared to the eight SVs in S through S+7 each
time that MTIM(543)/MTIMX(554) is executed, and if any of the SVs is less
than or equal to the PV, the corresponding Completion Flag (D1 bits 00
through 07) is turned ON.
When the PV reaches 9999, the PV will be reset to 0000 and all of the Com-
pletion Flags will be turned OFF. If the reset bit is turned ON while the timer is
operating or paused, the PV will be reset to 0000 and all of the Completion
Flags will be turned OFF.
Range
D1 D2
CIO 0 to CIO 6143
W0 to W511
H0 to H511
A448 to A959
T0000 to T4095
C0000 to C4095
D0 to D32767
@ D0 to @ D32767
---
--- DR0 to DR15
---
,IR0 to ,IR15
–2048 to +2047 ,IR0 to –2048 to +2047 ,IR15
DR0 to DR15, IR0 to IR15
,IR0+(++) to ,IR15+(++)
,–(– –)IR0 to, –(– –)IR15
Section 3-5
S
CIO 0 to
CIO 6136
W0 to W504
H0 to H504
A0 to A952
T0000 to T4088
C0000 to C4088
D0 to D32760
---
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