Omron CP - PROGRAMMING MANUAL 05-2007 Programming Manual page 164

Sequence Output Instructions
Description
Flags
Precautions
Example
Area
Data Registers
Index Registers
Indirect addressing using
Index Registers
When the execution condition is ON, OUTB(534) turns ON bit N of word D.
When the execution condition is OFF, OUTB(534) turns OFF bit N of word D.
15
D
ON
Execution condition
OFF
ON
Bit N of word D
OFF
If the immediate refreshing version is not used, the status of the execution
condition (power flow) is written to the specified bit in I/O memory. If the imme-
diate refreshing version is used, the status of the execution condition (power
flow) is written to the CPU Unit's output terminal as well as the output bit in I/O
memory.
There are no flags affected by this instruction.
Immediate refreshing (!OUTB(534)) can be specified. An immediate refresh
instruction updates the status of the output terminal just after the instruction is
executed on an output bit allocated to a CPU Unit built-in output, at the same
time as it writes the status of the execution condition (power flow) to the spec-
ified output bit in I/O memory.
When OUTB(534) is programmed between IL(002) and ILC(003), the speci-
fied bit will be turned OFF if the program section is interlocked. (This is the
same as an OUT instruction in an interlocked program section.)
When a word is specified for the bit number (N), only bits 00 to 03 of N are
used. For example, if N contains FFFA hex, OUTB(534) will control bit 10 of
word D.
0.00
OUTB
D0
&10
D
DR0 to DR15
---
,IR0 to ,IR15
–2048 to +2047, IR0 to –2048 to +2047, IR15
DR0 to DR15, IR0 to IR15
,IR0+(++) to ,IR15+(++)
,–(– –) IR0 to, –(– –) IR15
N 0
This bit is turned OFF.
Bit 10 of D0 is turned OFF
when CIO 0.00 is OFF.
Section 3-3
N
131