Omron CP - PROGRAMMING MANUAL 05-2007 Programming Manual page 158

Cp1h/cp1l cpu unit
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Sequence Output Instructions
Operands
Note
Operand Specifications
Description
D: Beginning Word
Specifies the first word in which bits will be turned ON or OFF.
N1: Beginning Bit
Specifies the first bit which will be turned ON or OFF. N1 must be #0000 to
#000F (&0 to &15).
N2: Number of Bits
Specifies the number of bits which will be turned ON or OFF. N2 must be
#0000 to #FFFF (&0 to &65535).
The bits being turned ON or OFF must be in the same data area. (The range
of words is roughly D to D+N2 16.)
D
to
D: 4,096 words max.
Area
CIO Area
Work Area
Holding Bit Area
Auxiliary Bit Area
Timer Area
Counter Area
DM Area
Indirect DM addresses in
binary
Indirect DM addresses in BCD *D0 to *D32767
Constants
Data Registers
Index Registers
Indirect addressing using
Index Registers
The operation of SETA(530) and RSTA(531) are described separately below.
Operation of SETA(530)
SETA(530) turns ON N2 bits, beginning from bit N1 of D, and continuing to the
left (more-significant bits). All other bits are left unchanged. (No changes will
be made if N2 is set to 0.)
D
N1
CIO 0 to CIO 6143
W0 to W511
H0 to H511
A448 to A959
A0 to A959
T0000 to T4095
C0000 to C4095
D0 to D32767
@ D0 to @ D32767
---
#0000 to #000F
(binary) or &0 to
&15
---
DR0 to DR15
---
,IR0 to ,IR15
–2048 to +2047, IR0 to –2048 to +2047, IR15
DR0 to DR15, IR0 to IR15
,IR0+(++) to ,IR15+(++)
,–(– –) IR0 to, –(– –) IR15
Section 3-3
N2
#0000 to #FFFF
(binary) or &0 to
&65535
125

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