Omron CP - PROGRAMMING MANUAL 05-2007 Programming Manual page 215

Cp1h/cp1l cpu unit
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Timer and Counter Instructions
Description
Flags
Precautions
182
Area
Counter Area
---
DM Area
---
Indirect DM addresses
---
in binary
Indirect DM addresses
---
in BCD
Constants
---
Data Registers
---
Index Registers
---
Indirect addressing
,IR0 to ,IR15
using Index Registers
–2048 to +2047 ,IR0 to –2048 to +2047 ,IR15
DR0 to DR15, IR0 to IR15
When the timer input is ON, TTIM(087)/TTIMX(555) increments the PV. When
the timer input goes OFF, the timer will stop incrementing the PV, but the PV
will retain its value. The PV will resume timing when the timer input goes ON
again. The timer's Completion Flag will be turned ON when the PV reaches
the SV.
The status of the timer's PV and Completion Flag will be maintained after the
timer times out. There are three ways to restart the timer: the timer's PV can
be changed to a non-zero value (by MOV(021), for example), the reset input
can be turned ON, or CNR(545)/CNRX(547) can be executed.
Timer input
SV
Timer PV
Completion
Flag
Reset input
Name
Label
Error Flag
ER
Timer numbers are shared by the TIM, TIMX(550), TIMH(015), TIMHX(551),
TMHH(540),
TMHHX(552),
TIMWX(816), TMHW(815), and TMHWX(817) instructions. If two timers share
the same timer number, but are not used simultaneously, a duplication error
will be generated when the program is checked, but the timers will operate
normally. Timers which share the same timer number will not operate properly
if they are used simultaneously.
N
Timing resumes.
PV maintained.
Operation
ON if N is indirectly addressed through an Index Register
but the address in the Index Register is not the PV
address of a timer.
ON if in BCD mode and S does not contain BCD data.
OFF in all other cases.
TTIM(087),
TTIMX(555),
Section 3-5
S
C0000 to C4095
D0 to D32767
@ D0 to @ D32767
*D0 to *D32767
BCD:
#0000 to 9999 (BCD)
"&" cannot be used.
Binary:
&0 to &65535 (decimal)
#0000 to #FFFF (hex)
DR0 to DR15
---
TIMW(813),

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