Omron CP - PROGRAMMING MANUAL 05-2007 Programming Manual page 733

Interrupt Control Instructions
Operand Specifications
Description
700
Scheduled Interrupts
N specifies the scheduled interrupt number and S specifies the time to the first
scheduled interrupt.
Operand
N Specify the scheduled interrupt number.
4: Scheduled interrupt 0 (interrupt task 2)
S 0000 to 270F hex:
Time to first scheduled interrupt (0 to 9999)
Note The unit for the scheduled interrupt interval can be set to 10 ms,
1.0 ms, or 0.1 ms in the PLC Setup interrupt settings.
High-speed Counter Interrupts
N specifies the high-speed counter interrupt number and S specifies the oper-
ation
Operand
N High-speed Counter Interrupt Number
10: High-speed counter input 0
11: High-speed counter input 1
12: High-speed counter input 2
13: High-speed counter input 3
S Recorded Interrupt Clear Specification
0000 hex: Recorded interrupt retained
0001 hex: Recorded interrupt cleared
Area
CIO Area
Work Area
Holding Bit Area
Auxiliary Bit Area
Timer Area
Counter Area
DM Area
Indirect DM addresses
in binary
Indirect DM addresses
in BCD
Constants
Data Registers
Index Registers
Indirect addressing
using Index Registers
Depending on the value of N, CLI(691) either clears the specified recorded
input interrupts or high-speed counter interrupts, or sets the time before exe-
cution of the first scheduled interrupt.
Contents
Contents
N
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Specified values only
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Section 3-19
S
CIO 0 to CIO 6143
W0 to W511
H0 to H511
A0 to A959
T0000 to T4095
C0000 to C4095
D0 to D32767
@ D0 to @ D32767
*D0 to *D32767
DR0 to DR15
,IR0 to ,IR15
-2048 to +2047, IR0 to
-2048 to +2047, IR15
DR0 to DR15, IR0 to IR15
,IR0+(++) to ,IR15+(++)
,-(- -) IR0 to, -(- -) IR15