Omron CP - PROGRAMMING MANUAL 05-2007 Programming Manual page 949

Display Instructions
Description
Flags
Precautions
916
Area
Holding Bit Area
Auxiliary Bit Area
Timer Area
Counter Area
DM Area
Indirect DM addresses
in binary
Indirect DM addresses
in BCD
Constants
Data Registers
Index Registers
Indirect addressing
using Index Registers
When the execution condition goes ON, SCTRL(048) lights or does not light
individual segments of the two digits of the 7-segment display on the CPU
Unit according to the value of C. Any combination of segments can be lit.
The display will remain until SCTRL(048) is executed with C set to #0000 to
clear all of the display segments. This will also clear displays created with
SCH(047). It will not clear displays generated by the system.
Left digit
Bit 8
Bit 13
Bit 12
Bit 11 Bit 14 Bit 15
There are no flags affected by SCTRL(048).
If displays are created by more than one SCTRL(048) or SCH(047) instruc-
tion, the last one that is executed with take priority.
Messages on the 7-segment display on the CPU Unit are displayed in the fol-
lowing order of priority. Therefore, system error message will be given priority
even if there is a display created with SCTRL(048) or SCH(047).
1. Error messages
2. SCTRL(048) or SCH(047) displays
3. Analog adjustment displays
4. Memory Cassette processing displays
If an error occurs while a SCTRL(048) or SCH(047) display is in effect, the
error message will be given priority, but the SCTRL(048) or SCH(047) display
will return when the error is cleared.
H0 to H511
A0 to A959
T0000 to T4095
C0000 to C4095
D0 to D32767
@ D0 to @ D32767
*D0 to *D32767
#0000 to #FFFF
DR0 to DR15
---
,IR0 to ,IR15
–2048 to +2047,IR0 to –2048 to +2047,IR15
DR0 to DR15, IR0 to IR15
,IR0+(++) to ,IR15+(++)
,–(– –)IR0 to ,–(– –)IR15
Bit 9
Bit 5
Bit 10
Bit 4
Section 3-25
C
Right digit
Bit 0
Bit 1
Bit 2
Bit 3 Bit 6
Bit 7