Omron CP - PROGRAMMING MANUAL 05-2007 Programming Manual page 239

Cp1h/cp1l cpu unit
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Timer and Counter Instructions
Example 5:
Flicker Bit
0.00
200.00
CIO 0.00
CIO 200.00
3-5-11 Indirect Addressing of Timer/Counter Numbers
206
The following program examples show two ways to create flicker bits. The
second example just mimics a clock pulse.
Two TIM Instructions
Two TIM timers can be combined to make a bit turn ON and OFF at regular
intervals while the execution condition is ON. In this example, CIO 200.00 will
be OFF for 1.0 second and then ON for 1.5 seconds as long as CIO 0.00 is
ON.
1.0 s
1.5 s
1.0 s
1.5 s
Clock Pulse
The desired execution condition can be combined with a clock pulse to mimic
the clock pulse (0.1 s, 0.2 s, or 1.0 s).
0.00
P_1 s
1-s clock pulse
0.00
1-s clock
pulse
100.00
Timer and counter numbers can be indirectly addressed using Index Regis-
ters. When Index Registers will be used for indirect addressing, use
MOVRW(561) (MOVE TIMER/COUNTER PV TO REGISTER) to set the PLC
memory address of the desired timer or counter's PV to the desired Index
Register.
The following timers and counters can be indirectly addressed using Index
Registers:
TIM,
TTIMX(555),
TMHH(540),
TMHW(815), TMHWX(817), CNT, CNTX(546), CNTR(012), CNTRX(548),
CNTW(814), and CNTWX(818). (These are the timers and counters that use
timer and counter numbers.)
Address
000000
000001
#10
000002
000003
000004
#15
000005
200.00
000006
100.00
TIMX(550),
TIMH(015),
TMHHX(552),
Section 3-5
Instruction Operands
LD
0.00
AND
T0002
TIM
0001
#10
LD
200.00
TIM
0002
#15
LD
T0001
OUT
200.00
Address
Instruction Operands
000000
LD
000001
AND
000002
OUT
TIMHX(551),
TTIM(087),
TIMW(813),
TIMWX(816),
0.00
1s
100.00

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