Bus Operation
CLK
CLKEN
BCLK
BB or TIP
THREE-STATING FROM
ASSERTED STATE
CLK
CLKEN
BCLK
BB or TIP
THREE-STATING FROM
ASSERTED STATE
7-2
CLK
CLKEN
OUTPUTS
INPUTS
NOTES:
1.
t d
= Propagation delay of signal relative to CLK rising edge.
t ho
2.
= Output hold time relative to CLK rising edge.
t su
3.
= Required input setup time relative to CLK rising edge.
t hi
= Required input hold time relative to CLK rising edge.
4.
Figure 7-1. Signal Relationships to Clocks
Figure 7-2. Full-Speed Clock
Figure 7-3. Half-Speed Clock
M68060 USER'S MANUAL
t d
t ho
t su
t hi
MOTOROLA