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Designing a Target System
Designing a Target System
Designing a Target System
This chapter will help you design a target system that will work with the
emulation probe. Signal requirements and JTAG connector pinouts are shown.
Target System Requirements for M•CORE
Required Signals
DE signal (MMC2107)
This signal is not required; however, we stongly recommend that you include
it on the target header connector (shown on page 56).
The DE signal can be asserted by the target processor as a result of a
breakpoint condition. The DE signal can also be asserted by the emulation
probe to cause the target processor to enter debug mode.
When a breakpoint condition occurs, the DE signal can be used to trigger a
logic analyzer through the trigger out SMB port(see page 65). Without DE, the
processor must be stopped using the JTAG scan chains, and the processor
may not stop until several hundred instructions have been executed. This may
cause complications when attempting to correlate the state of the logic
analyzer and the emulation probe after the breakpoint has been reached.
A logic analyzer can stop processor execution by driving the DE line through
the emulation probe's break in SMB port.
TDO, TDI, TCK, TMS, TRST, and Target_Reset signals
TDO, TDI, TCK, TMS and TRST signal traces between the JTAG connector
and the M•CORE target must be less than 3 inches long. If these signals are
connected to other nodes, the other nodes must be daisy chained between the
JTAG connector at one end and the M•CORE microprocessor at the other
end. These signals are sensitive to crosstalk and must not be routed along
active signals such as clock lines on the target board.
The TDI, TCK, TMS and TRST signals must not be actively driven by the
target system when the debug port is being used.
54
Emulation for the Motorola M•CORE
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Troubleshooting
